The present invention is generally related to differential driver circuits, and more particularly to fast LVDS drivers including those having stringent short-to-ground requirements.
The next generation low voltage differential signaling (LVDS) transceiver parts being developed are the high speed LVDS repeater type, such as PECL/ECL to LVDS converter type. These transceivers are configured to receive a differential input signal and drive a TIA/EIA-644 compliant LVDS signal. There are several high speed LVDS repeater parts currently on the market, but none which is fully TIA/EIA-644 compliant. The chief technical problem with a high speed repeater (up to 1.36 GBps) is to reduce the rise/fall times into the range in which the maximum speed requirement can be adequately met. Existing TIA/EIA-644 compliant drivers are typically current mode differential drivers which are limited by their architecture to around 600 MBps. Existing Gigibit speed repeaters are generally not TIA/EIA-644 compliant.
Moreover, the high speed repeaters currently on the market do not conform to the short-to-ground requirements called out in the TLA/EIA-644 specification, and therefore are not truly LVDS compatible.
There is desired a Gigibit fast LVDS driver which limits output current for shorts-to-ground.
The present invention achieves technical advantage as a Gigabit fast LVDS transceiver (50) which also limits output current for shorts to ground. The circuit acts to both detect and limit the current in the voltage reference portion of the output. A methodology is used to detect and limit the current which provides a significant improvement in performance over the prior art. The fast LVDS transceiver is particularly adapted to be fully TIA/EIA-644 compliant.